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Suricata IDS + FPGA SmartNIC Demo on 400Gbps | Flow-Based Acceleration with DYNANIC
Compact 200G FPGA SmartNIC
USENIX ATC '22 - FpgaNIC: An FPGA-based Versatile 100Gb SmartNIC for GPUs
Optimizing IDS Performance Using FPGA SmartNICs
20250718 - M. Sada/SDSC - “Inter-Testbed Networking with FPGA/SmartNICs across FABRIC and NRP
OSDI '24 - ACCL+: an FPGA-Based Collective Engine for Distributed Applications
Modular SmartNIC Design Using FPGAs | Achronix
AMD HACC Tech Talks: FPGA-based SmartNICs: OS4C and Beyond
Infrastructure Acceleration: SmartNICs, DPUs, FPGAs and more
![Corundum: An Open-Source 100-Gbps NIC [FCCM 2020]](https://i.ytimg.com/vi/YbVbzduicy0/mqdefault.jpg)
Corundum: An Open-Source 100-Gbps NIC [FCCM 2020]
FPL22 A Framework for Neural Network Inference on FPGA-Centric SmartNICs
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Last Updated: August 12, 2026
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